1. Field of the Invention
This invention relates to a television receiver horizontal output circuit having an east and west pincushion distortion correcting function.
2. Description of the Related Art
A conventional horizontal output circuit having a pulse width modulating east and west pincushion distortion correcting function is shown in FIG. 6. A horizontal output transistor Q3, damper diode Dd and resonant capacitor C01 are connected in parallel with a series circuit of a horizontal deflecting coil Dy and S correcting capacitor Cs. Between the emitter of the horizontal output transistor Q3 and a reference potential point GND are provided a capacitor C1 and diode D3 so that the cathode may be on the reference potential side. Further, between the collector of the horizontal output transistor Q3 and the reference potential point GND are connected in parallel a diode D4 and second resonant capacitor C02. Also, the collector of the horizontal output transistor Q3 is connected to a DC power source EB through a primary winding of a fly-back transformer FBT. A decoupling capacitor C3 is connected in parallel with the DC power source EB.
A pulse width modulating integrated circuit (which shall be mentioned as a pulse width modulating IC hereinafter) 10 is connected through a coil L1 to the capacitor C1 at one end. This pulse width modulating IC 10 is provided with power source terminals 12 and 13 and a signal output terminal 14. The signal output terminal 14 of this IC 10 and the above mentioned capacitor C1 at one end are connected with each other through the coil L1.
The final step of the pulse width modulating IC 10 is formed of a single end type of a PNP transistor Q1 and NPN transistor Q2. The emitter of the PNP transistor Q1 is connected to a positive power source terminal 12 and the emitter of the NPN transistor Q2 is connected to a negative power source terminal 13. Between the collector and emitter of both the PNP transistor Q1 and the NPN transistor Q2 are provided diodes D1 or D2 respectively. The diode D1 is provided so that the cathode may be on the emitter side of the PNP transistor Q1 and the diode D2 is provided so that the cathode may be on the collector side of the NPN transistor Q2.
A pulse width modulating driving circuit 11 is connected to each transistor base. The NPN and PNP transistors Q1 and Q2 are controlled to be on and off by this pulse width modulating driving circuit 11. A positive power source terminal 12 is connected to the reference potential point. A negative power source terminal 13 is connected to the connecting point of a capacitor C4 and diode D5 of a rectifying circuit 20 provided on the tertiary winding side of the fly-back transformer FBT. Through this arrangement, rectifying circuit 20 comprises a diode D5 and capacitor C4. A constant negative voltage -Vcc obtained by rectifying the tertiary winding voltage is fed to the negative power source terminal 13.
The horizontal output circuit is formed as described above. A negative resonant voltage produced in the capacitor C1 during the fly-back time is varied to be parabolic in a vertical period (1V) by a pulse-like signal repeatedly fed from a modulating signal source 10. That is to say, by making the width of a pulse-like signal variable by the modulating signal source 10, the amplitude of the horizontal deflecting current is modulated to be parabolic in a vertical period and the east and west pincushion distortion is corrected.
Here, if the average value of the negative resonant voltage produced in the capacitor C1 is represented by Vlave, the voltage of the DC power source EB is represented by EB, the inductance of the horizontal deflecting coil Dy is represented by Ly and the scanning period is represented by Ts, in such circuit as in FIG. 6, the deflecting current Iy (p-p value) will be given by the following formula: ##EQU1##
, where p-p is an abbreviation of "PEAK TO PEAK" and represents a width from the minimum value to the maximum value of the amplitude of the deflecting current.
In the circuit in FIG. 6, the negative resonant voltage produced in the capacitor C1 by the pulse width modulating IC 10 connected to the coil L1 is varied to be parabolic by a vertical period (1V) and the east and west pincushion distortion is corrected. This operation shall be explained in the following.
FIGS. 7(a)-7(c) are diagrams for explaining the operation of the circuit shown in FIG. 6. FIGS. 7(a)-7(c) show the operation over a horizontal period (1H). Time is shown on the abscissa of the diagram. FIG. 7(a) represents a resonant voltage of the capacitor C1, FIG. 7(b) represents an output voltage of the IC 10, and FIG. 7(c) represents an output current of the IC 10.
In the period of t0 to t2, a driving voltage is fed to the base of the transistor Q1 from the pulse width modulating driving circuit 11 in the front step. The PNP transistor Q1 becomes conductive. An output current I1 flows to the coil L1 from the signal output terminal 14 through the emitter-collector path of Q1 from the reference potential point GND. Between t0 and t1 (fly-back period) within this period, the current I1 is linearly increased by the negative resonant voltage (FIG. 7(a)) produced in the capacitor C1. In t1 to t2, both ends of the capacitor C1 are short-circuited by the diode D3 and are therefore of the reference potential. There is no voltage within the loop formed by the positive power source terminal of the reference potential point and the signal output terminal 14, and the current I1 is held constant from the time t1. At t2, the Q1 is turned off (at this time, a driving voltage is applied to the base of the Q2 from the driving circuit 11 in the front step and the Q2 turns on) and a current I2 flows to the coil L1 through the diode D2 from the negative power source terminal 13 in the direction holding the previous current by a counter electromotive force generated in the coil L1. At this time, the current I2 is decreased with time by the negative power source (-Vcc) on the basis of the linear current flowing in the reverse direction. Again, at the time t0, a driving voltage is applied to the base of the PNP transistor Q1 and the above mentioned operation is repeated. When the period from t0 to t1 and further to t2 is represented by T1 and the period from t2 to the next t0 is represented by T2, the magnitude of the resonant voltage (negative value -V1) produced in the capacitor C1 can be modulated by varying the ratio (T1/T2) as shown by the solid line and dotted line in FIG. 7(a).
The waveform of the dotted line in FIGS. 7(a)-7(c) represent the operation when the ratio of the time for the waveform of the solid line is varied, the T1 is made longer and the T2 is made shorter. When the T1 is made longer, the discharge current of the capacitor C1 flowing through the coil L1 will increase causing the resonant voltage produced in the capacitor C1 decrease as shown by the dotted line in FIG. 7(a).
When the ratio of T1/T2 in the vertical period is varied utilizing this principle, the east and west pincushion distortion can be corrected. That is to say, if T1/T2 is made larger at the beginning and end of the vertical period and smaller where it corresponds to the middle in a picture screen, the resonant voltage V1 is inversely affected, decreasing at the beginning and end of the vertical period and increasing where it corresponds to the middle in the picture screen. Therefore, as evident from the formula 1, the deflecting current Iy will become smaller at the beginning and end of the vertical period and will become larger where it corresponds to the middle in the picture screen. Thus, the east and west pincushion distortion will be able to be corrected. Diode D4 prevents the sum (ILP+IDC) of the primary winding current ILP flowing to the diode D3 and the direct current IDC flowing in from the DC power source EB from becoming negative at the beginning of the scanning period or from becoming discontinuous, and prevents the diode D3 from being off.
However, there are the following defects in the above mentioned circuit.
In FIG. 6, the output current I2 in the T2 period flows in the normal direction of the diode D2 from the power source terminal 13 of the pulse width modulating IC 10. When there is no shunt regulator 40, the output current I2 at this time will pass through the smooth capacitor C4 in the rectifying circuit 20 of the negative power source (-Vcc) from the reference potential point GND, will flow into the power source terminal 13 of the modulating IC 10, and will negatively charge the smooth capacitor C4. Therefore, the diode D5 will be off, the voltage at both ends of the smooth capacitor C4 will progressively reduce with the number of the operations until at last the circuit no longer inherently operates.
In order to prevent such problems, it is necessary to provide the shunt regulator 40 between the power source terminal 13 and rectifying circuit 20 as shown in FIG. 6. In order that the power source voltage may be constant, an electric current corresponding to the output current I2 must flow continuously. In such case, there have been problems of increasing the cost of the shunt regulator 40 and incurring an excessive power loss. For example, if the average value of the output current I2 is 250 mA and -Vcc is -27 V, an electric power of 6.8 W will be lost. Also, when the required correction amount is large, as the maximum correction range is from the reference potential to the negative power source voltage -Vcc, there has been a problem that the number of the tertiary windings of the fly-back transformer FBT will have to be increased and the negative power source voltage -Vcc will have to be increased if the variation width of the average value -Vlave of the resonance voltage of the capacitor C1 is intended to be made larger to increase the correction amount.
FIG. 8 shows another conventional example of a horizontal output circuit having a pincushion distortion correcting circuit. A first resonant capacitor C01 and damper diode Dd are connected in parallel with a series circuit of a horizontal deflecting coil Dy and S correcting capacitor Cs. A east and west pincushion distortion correcting circuit is provided between the series circuit of the horizontal deflecting coil Dy and S correcting capacitor Cs and the reference potential point GND. This east and west pincushion distortion correcting circuit is formed of a capacitor C1, diode D7 (corresponding to the diode D3 in FIG. 6) and series circuit consisting of a coil L2 and capacitor C2. The diode D7 is provided so that the anode may be on the reference potential side. The capacitor C1 is connected in parallel with this diode D7. A series circuit of the coil L2 and capacitor C2 is provided in parallel with this capacitor C1. Nothing corresponds to the diode D4 provided in FIG. 6. By providing the series circuit of the coil L2 and capacitor C2, a saw tooth wave current i1 is made to flow in the illustrated direction and the diode D7 is prevented from being off in the initial period of the scanning period.
A positive voltage is fed to the positive power source terminal 12 of a pulse width modulating IC 10 through a rectifying circuit 30 from the tertiary winding of a fly-back transformer FBT. The negative power source terminal 13 of this modulating IC 10 is connected to the reference potential point GND and the signal output terminal 14 is connected to the capacitor C1 through the coil L1.
The operation in FIG. 8 shall be explained in the following. It is fundamentally the same as in FIG. 6. The deflecting current is given by the formula 2: ##EQU2##
During the fly-back period, as different from the circuit in FIG. 6, a positive resonant voltage V1 is produced in the capacitor C1. In order to modulate it, a pulse having a predetermined duty ratio is repeatedly fed from the signal output terminal 14 of the modulating IC 10 to the capacitor C1. By varying this duty ratio, that is, the ratio of T1/T2 in the same manner as in FIG. 7, the resonance voltage V1 is varied to be parabolic in a vertical period (1V) and the east and west pincushion distortion is corrected.
However, even in this circuit, it is necessary to provide a shunt regulator 50 between the positive power source Vcc and reference potential point GND or another load corresponding to the shunt regulator 50 between the power source Vcc line and reference potential point GND to discharge the current I1 flowing into the power source Vcc line. Therefore, when there is no other load corresponding to the shunt regulator, the same as in FIG. 6, the cost of the shunt regulator will become high and an excessive power loss will be incurred.
As mentioned above, in the conventional technique, a positive or negative power source must be provided for the tertiary winding of the fly-back transformer, there is no discharging path in the capacitor of the tertiary winding side rectifying circuit, and a discharging load or regulator must be provided between the rectifying circuit and positive or negative power source terminal. Therefore there has been a problem that not only the number of component parts increases but also an excessive power loss is incurred in the regulator.